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Title: | Πρωτότυπος Αλγόριθμος Επίλυσης Του Προβλήματος Της Τοποθέτησης Σε Επαναδιαμορφούμενες Αρχιτεκτονικές Τριών Διαστάσεων Με Χρήση Αλγορίθμων Αποικιών Μυρμηγκιών |
Authors: | Παναγιώτης Δανασής Σούντρης Δημήτριος |
Keywords: | τρισδιάστατες αρχιτεκτονικές επαναδιαμορφούμενες αρχιτεκτονικές fpga εργαλεία σχεδίασης με χρήση υπολογιστή cad πρόβλημα της τοποθέτησης placement παράλληλοι αλγόριθμοι αλγόριθμοι αποικιών μυρμηγκιών ant colony optimization (aco) ant colony system (acs) max-min ant system (mmas) |
Issue Date: | 12-Jun-2015 |
Abstract: | Placement is considered one of the most arduous and time-consuming processes in physical implementation flows for reconfigurable architectures, while it highly affects the quality of derived application implementation as it has impact on the maximum operating frequency. This problem becomes more acute for three-dimensional (3-D) architectures, because the complexity of these architectures imposes additional challenges that have to be sufficiently addressed. Throughout this thesis we introduced a novel placement algorithm, targeting 3-D reconfigurable architectures, based on Ant Colony Metaheuristics. Ant colonies are distributed systems that, in spite of the simplicity of their individuals, present a highly structured social organization and as a result can accomplish complex tasks using the collective intelligence of the group. One of the most successful examples of ant based algorithms is known as Ant Colony Optimization (ACO). ACO is inspired by the foraging behavior of ants. Our proposed algorithm incorporates concepts from both $MAX-MIN$ Ant System and Ant Colony System, the two best performing algorithms of the ACO family. It exhibits numerous advantages, such as inherent parallelism, direct enforcement of legality constrains into the cost function and support of heterogeneous architectures. Experimental results validate the effectiveness of our algorithm since it achieves on average 10% reduction on the critical path delay. This results to designs with increased maximum operating frequency and reduced power consumption. Additionally our placer can achieve speedup in multi-core architectures very close to the theoretical one. This means that our proposed algorithm can take full advantage of todays multi-core CPUs, further decreasing the execution run-time. |
URI: | http://artemis-new.cslab.ece.ntua.gr:8080/jspui/handle/123456789/12774 |
Appears in Collections: | Διπλωματικές Εργασίες - Theses |
Files in This Item:
File | Size | Format | |
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DT2015-0126.pdf | 11.4 MB | Adobe PDF | View/Open |
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