Please use this identifier to cite or link to this item: http://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/12974
Title: Inferior Olive Simulations On Many Integrated Core Platforms
Authors: Νομικού Σοφία
Σούντρης Δημήτριος
Keywords: inferior olive
simulator
xeon processor
xeon phi coprocessor
mpi
openmp
hybrid mpi/openmp
cell connectivity
Issue Date: 30-Oct-2015
Abstract: Biologically accurate simulations of brain cells play a very important role in the exploration and understanding of human brain’s function. Neuroscientists use them in order to observe and predict brain’s behaviour. The collected information assists their efforts in creating devices and patents to improve the living conditions of people suffering from neurological problems. To this direction, several neuron models have been developed.In this thesis, a biologically accurate simulator of the Inferior Olive cells will be studied. The Inferior Olivary body of human cerebellum has been proved to contribute to human space perception and motor skills. Due to the significant complexity of the simulated IO cell networks, which is due to the large number of cells and their numerous interconnections, parallelisation of the developed brain cell simulators has emerged as a means to improve the simulation’s performance.Therefore, the main subject of this thesis is the porting of the simulator to an Intel Many Integrated Core (MIC) architecture. Two Xeon - Xeon Phi machines will be utilised and three different programming models will be studied. The Message Passing Interface (MPI) application is used as legacy code and serves as the base for development of the OpenMP and the Hybrid MPI/OpenMP implementation. The OpenMP code focuses on exploring the massive paralleli- sation of the simulator and the Hybrid application aims at combining the benefits from the MPI and the OpenMP implementations, to achieve better performance. The different programming paradigms are compared against each other with Figures detailing each models performance results. Finally, the most efficient programming paradigm for the simulator on the MIC archi- tecture is concluded.
URI: http://artemis-new.cslab.ece.ntua.gr:8080/jspui/handle/123456789/12974
Appears in Collections:Διπλωματικές Εργασίες - Theses

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