Please use this identifier to cite or link to this item: http://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/15591
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dc.contributor.authorΒασίλειος Καρακώστας
dc.date.accessioned2018-07-23T16:09:35Z-
dc.date.available2018-07-23T16:09:35Z-
dc.date.issued2009-11-10
dc.date.submitted1990-12-1
dc.identifier.urihttp://artemis-new.cslab.ece.ntua.gr:8080/jspui/handle/123456789/15591-
dc.description.abstractTransactional Memory (TM) is a new concurrency mechanism that aims to make parallel programming easier, while it promises scalable performance. Recently, several TM designs have been proposed that promise to make TM more efficient. However, most of these systems have been evaluated and analyzed by using microbenchmarks that are not representative of realistic workloads. We believe that the evaluation of TM proposals would be more comprehensive if it included representative benchmarks from the emerging future applications of Recognition, Mining and Synthesis (RMS) domain.In this thesis, we extend the existing RMS-TM benchmark suite with three new applications. RMS applications have often been proposed as good benchmarks for testing new architectures. Moreover, besides being scalable and non-trivial, they present special characteristics, such as memory management operations, complex function calls and I/O operations inside critical sections, that could be challenging for testing TM designs.In order to select the new applications, we followed a well-defined methodology. We divided the selection process into two phases applying differentcriteria on each phase. Finally, we transactified the applications, that successfully passed the selection process, by using an STM and an HTM system. Our experiments show that the TM-versions of our applications exhibit a wide range of transactional and runtime characteristics that qualify them as a comprehensive TM benchmark suite.
dc.languageGreek
dc.subjecttransactional memory
dc.subjectbenchmark suite
dc.subjectworkload characterization
dc.subjectrecognition-mining-synthesis
dc.subjectlock-free synchronization
dc.subjectparallel programming
dc.subjectmulticore processors.
dc.titleExtension Of A Recognition, Mining And Synthesis Benchmark Suite For Transactional Memory
dc.typeTechnical Report
dc.description.pages1
dc.contributor.supervisorΚοζύρης Νεκτάριος
dc.departmentΤομέας Τεχνολογίας Πληροφορικής & Υπολογιστών
dc.organizationΕΜΠ, Τμήμα Ηλεκτρολόγων Μηχανικών & Μηχανικών Υπολογιστών
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