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Title: | Impact Of Temperature And Power Supply Voltage Variations On Performance Prediction In 3d Ics During Early Stage Design Exploration On 45nm |
Authors: | Φίλιππος Τουφεξής Σούντρης Δημήτριος |
Keywords: | 3d ics thermal simulation compact thermal model ir-drop 3d floorplanning metaheuristics genetic algorithms extreme value theory maximum power estimation static timing analysis design space exploration |
Issue Date: | 6-Jul-2011 |
Abstract: | In this work, a novel design flow, to perform design exploration in 3D ICs is proposed. In this framework, power consumption, timing and fabrication cost are the design goals. Power supply voltage and thermal variations are taken into account, to allow accurate performance predictions. An extensive pre-characterization step, aids fast and accurate whole-system performance predictions. Extreme Value Theory is used to speed-up worst case power estimation. 3 levels of hierarchy are assumed: Modules comprising gates, Common Power Supply Hyper Modules comprising modules under the same power supply, the whole Chip, comprising Common Power Supply Hyper Modules. Floorplanning is a two-step procedure. Initially, Common Power Supply Hyper Modules are treated. Finally, the whole chip is designed. Most parts of the proposed framework were implemented, and used to investigate the impact of temperature and power supply voltage variations, on performance prediction in 3D ICs on 45nm. The ITC99 benchmark circuits were used, along with standard cells from Nangate45, a 45nm standard cell library. The behavior of standard cells in 45nm, and of bigger circuit modules up to 220000 gates, as a function of voltage and temperature is extracted and reported. Strong dependencies on supply voltage and temperature are observed. In a big system, on the order of hundreds million gates, the variability of power supply voltage and temperature is shown to cause on average 40% increase in timing and 53% increase in power consumption, compared to the assumption of nominal conditions, rendering the traditional 5 corner-based design flow inappropriate, for large designs. Finally, a multi-objective genetic algorithm, based on a previously published 3D floorplan representation, along with custom mutation and crossover operators, is shown to optimize for power consumption and timing, yielding clear and useful tradeoffs. |
URI: | http://artemis-new.cslab.ece.ntua.gr:8080/jspui/handle/123456789/16002 |
Appears in Collections: | Διπλωματικές Εργασίες - Theses |
Files in This Item:
File | Size | Format | |
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DT2011-0103.pdf | 1.87 MB | Adobe PDF | View/Open |
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