Characterizing Thread Placement And Thread Priorities In The Ibm Power7 Processor

Abstract

The current trend in processor design is towards the combination of several thread level parallelism paradigms on the same chip. A popular combination is Chip Multiprocessingwith Simultaneous Multithreading (CMP+SMT), implemented in processors such as the IBM POWER7. In such complex multithreaded designs, resource sharing between threads has a great impact on final performance. There are different ways of interfering with resource sharing, including thread placement, which involves assigning software threads to the available hardware contexts, and thread priorities, assuming a processor in the IBM POWER family, that features a mechanism allowing the user to alter the instruction fetchrate of active threads.We have analyzed thread placement and thread priorities in the IBM POWER7 processor. Under each placement and priorities setup we analyze in detail how hardware resourcesare shared among running threads. We show to which extent a software designer can characterize an application on the specific processor and based on that characterization, select the best thread placement and thread priorities configuration to improve a target metric. Our results show that a 54% reduction in execution time can be obtained (11.2% on average) when running pairs of desktop parallel applications under the appropriate thread placement. On top of that, our study has shown that up to an extra 12.7% of execution time improvement can be achieved with the use of priorities on parallel applications.