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dc.contributor.authorPapanikolaou Michail
dc.date.accessioned2018-07-23T18:36:17Z-
dc.date.available2018-07-23T18:36:17Z-
dc.date.issued2013-7-12
dc.date.submitted2013-7-4
dc.identifier.urihttp://artemis-new.cslab.ece.ntua.gr:8080/jspui/handle/123456789/16637-
dc.description.abstractThe purpose of the present diploma thesis is the hardware design of an arithmetic unit forefficient implementation of speech codecs. First of all, that was an idea of Mr. N.Moschopoulos who noticed that nowadays execution of speech codecs is done mainly bygeneral purpose DSPs. It would be interesting to study arithmetic operations of speechcodecs and search for an efficient arithmetic unit that it could work as (a part of) anArithmetic and Logic Unit (ALU) dedicated to speech applications.
dc.languageEnglish
dc.subjectspeech coding
dc.subjectwaveform codecs
dc.subjectparametric codecs
dc.subjecthybrid codecs
dc.subjectg.711
dc.subjectg.726
dc.subjectg.722
dc.subjectg.722.2 g.723.1
dc.subjectg.729
dc.subjectilbc
dc.subjectsilk
dc.subjectopus
dc.subjectc programming with matlab
dc.subjectprofiling of arithmetic operations
dc.subjectarithmetic data dependencies
dc.subjecthardware design
dc.subjectverilog hdl
dc.titleSpeech Codecs Analysis, Basic Arithmetic Operations Profiling And Efficient Hardware Mapping
dc.typeDiploma Thesis
dc.description.pages125
dc.contributor.supervisorΠεκμεστζή Κιαμάλ
dc.departmentΤομέας Τεχνολογίας Πληροφορικής & Υπολογιστών
dc.organizationΕΜΠ, Τμήμα Ηλεκτρολόγων Μηχανικών & Μηχανικών Υπολογιστών
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