Please use this identifier to cite or link to this item: http://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/17261
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dc.contributor.authorZampelis, Nikolaos Rafail-
dc.date.accessioned2019-05-08T15:02:11Z-
dc.date.available2019-05-08T15:02:11Z-
dc.date.issued2019-04-18-
dc.identifier.urihttp://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/17261-
dc.description.abstractIn recent years, dependability of digital systems has been threatened partly due to highly dynamic workloads, user input data, environment and hardware imperfections known as process variability. The latter causes concerns for the reliable operation of the system as it can generate faults in the hard- ware layer that may cause binary errors and affect the overall performance of the chip. To mitigate this variation, the industry has developed a series of Reliability, Availability and Serviceability (RAS) techniques. These techniques, among others, counter the effects of process variability and ensure de- pendable performance by trading-off either power, silicon area or execution time. In this thesis we present a PID controller that will perform Dynamic Voltage and Frequency Scaling (DVFS) switches to counter the effects of RAS-induced rollback delays and manage timing deadlines. In addition, the efficiency of our controller will be tested when another concurrent application is running on the same CPU, simulating another case of workload dynamism. We compare our methodology with prominent state-of-the-art DVFS algorithms and prove the PID’s enhanced performance while minimizing energy consumption. Finally, we present a version of the PID controller that aims to manage the system’s temperature, as meeting temperature constraints is of paramount importance in modern embedded systems. Our scheme is deployed on the iMX6Q-SABRE-SD board from NXP while we focus on a realistic, real-time application that is streaming in nature. In detail, our application is drawn from the telecom- munication domain and is expected to run on typical embedded platforms. Therefore, we discuss a closed-loop controller that utilizes DVFS to account for performance variation using a realistic appli- cation with timing deadlines.en_US
dc.languageenen_US
dc.subjectPID, Reliability, RAS mechanisms, Process Variation, performance variability, DVFS, iMX6Q Boarden_US
dc.titleManaging Dependability and Temperature in the presence of Performance Variability for Embedded Systemsen_US
dc.description.pages68en_US
dc.contributor.supervisorΣούντρης Δημήτριοςen_US
dc.departmentΤομέας Τεχνολογίας Πληροφορικής και Υπολογιστώνen_US
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