Please use this identifier to cite or link to this item: http://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/18650
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dc.contributor.authorΣιόκουρου, Αιμιλία-
dc.date.accessioned2023-04-06T12:13:19Z-
dc.date.available2023-04-06T12:13:19Z-
dc.date.issued2023-03-31-
dc.identifier.urihttp://artemis.cslab.ece.ntua.gr:8080/jspui/handle/123456789/18650-
dc.description.abstractThe past couple of years 5G wireless systems have started appearing for commercial purposes. Even thought, fully compatible systems are yet to appear, new features are continuously integrated not only on the telecommunication infrastructure but also to user equipment. As this integration continues and the needs of these systems become even more demanding, it is vital to cater them with stable, reliable and intelligent communication systems. Thus, they require high-speed digital interfaces which are capable to tackle these issues. Field Programmable Gate Arrays (FPGAs) are an excellent choice for this purpose since they provide a great trade-off of price, processing power, efficiency and parallelism. In this diploma thesis, we target the correction of I-Q imbalances in Direct Conversion Receivers with an algorithm implemented in the software suite Xilinx Vivado, using hardware description language (VHDL). The evaluation of the algorithm is performed in MATLAB by comparing the relative error between the original data and the corrected results in both MATLAB and Vivado. Next, we use an RF Dataset which includes 24 digital and analog modulation types at varying signal-to-noise ratios (SNRs) and apply I-Q imbalance to its data. Then utilizing this dataset as a test bench for the correction algorithm in Vivado we restore the imbalanced data to their original state. Finally, with the assistance of the Vitis-AI environment we perform RF-modulation recognition using Deep Neural Networks to classify the different modulations and evaluate the accuracy of the classification from the original, the imbalanced and the corrected data. The performance and accuracy, of the quantized and compiled models, is verified on the Zynq Ultrascale+ RFSoC ZCU111 board.en_US
dc.languageenen_US
dc.subjectFPGAen_US
dc.subjectVHDLen_US
dc.subjectDigital Communicationen_US
dc.subjectI-Q Imbalance Correctionen_US
dc.subjectQAM Modulationen_US
dc.subjectMachine Learningen_US
dc.subjectNeural-Networksen_US
dc.subjectModulation Recognitionen_US
dc.subjectAccuracyen_US
dc.subjectPerformanceen_US
dc.titleΑξιολόγηση τηλεπικοινωνιακού συστήματος με συνδυασμό μηχανικής μάθησης και κλασικών τεχνικών επεξεργασίας σήματοςen_US
dc.description.pages114en_US
dc.contributor.supervisorΣούντρης Δημήτριοςen_US
dc.departmentΤομέας Τεχνολογίας Πληροφορικής και Υπολογιστώνen_US
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