Integrated Circuit Architectures for Classical and Neural Computing with Applications in Artificial Intelligence

Abstract

The structure of this doctoral thesis is as follows. Initially, a general introduction to Machine Learning and traditional algorithm implementation methods is provided, along with the prevailing trend in recent years, new methods with the introduction of hardware-friendly implementations, and the motivation behind this thesis. Next, the thesis continues with a literature review and classification of circuits implementing the Gaussian function. Alongside relevant applications and proposed architectures, these comprise the second chapter. The third chapter addresses a series of new circuits and architectures designed, studied, and analyzed in detail in this thesis for the first time, which are correlated with the implementation of the Gaussian function. The fourth chapter discusses architectures for implementing classifiers using Gaussian Mixture Model and Bayes models. Circuits implementing the Gaussian function serve as the fundamental circuitry unit. All implementations are approaches to the mathematical model governing machine learning algorithms/models. The fifth chapter elaborates on the methods and topologies for implementing machine learning models/algorithms, Radial Basis Function, and Centroid-based Classifiers. The function describing the distance is implemented with the help of the Gaussian function. The sixth chapter presents a new approach to architectures aiming to implement not only classification but also learning in hardware. Based on this, new architectures for implementing the Support Vector Machine and Threshold algorithms are introduced. A variety of applications have been studied so far, including medical (thyroid, epilepsy, anesthesia control, and others) as well as interdisciplinary ones. The seventh chapter introduces a generalized methodology for designing Bell-shaped classifiers, aiming to categorize the previous categories. The eighth chapter presents the content of three works concerning the implementation of Edge detectors in hardware for peak detection with circuits operating in the Subthreshold region, offering low power consumption. In the ninth chapter, architectures based on Fuzzy Logic are analyzed, aiming to implement classifiers and controllers using circuits operating in the Subthreshold region. The tenth chapter presents implementations of more complex models. It also provides a generalized comparison of previous architectures in interdisciplinary applications. The summary and future work section evaluate the conducted research, summarize its conclusions, and outline future goals.